00001
00002
00003 #ifndef __SYSTEM
00004 #include "routix/system.h"
00005 #endif
00006
00007
00008
00009 #define SENDBYTE_TIMEOUT 1000000
00010 #define GETBYTE_TIMEOUT 1000000
00011
00013
00015
00016
00017 #define ERR_TIMEOUT -1
00018 #define ERR_NEED_RESET -2
00019 #define ERR_MAX_TRYS -3
00020 #define NO_VALIDO -100
00021
00023
00025 #define BASE 0x3f0
00026 #define SRA BASE
00027 #define SRB BASE+1
00028 #define DOR BASE+2
00029 #define MSR BASE+4
00030 #define DSR BASE+4
00031 #define DATA BASE+5
00032 #define DIR BASE+7
00033 #define CCR BASE+7
00034
00035
00036
00037 #define MOTD 1<<7 | 4
00038 #define MOTC 1<<6 | 4
00039 #define MOTB 1<<5 | 4
00040 #define MOTA 1<<4 | 4
00041 #define DMA 1<<3 | 4
00042 #define DMA_INT DMA
00043 #define RESET 0
00044 #define DRIVE_0 0
00045 #define DRIVE_1 1
00046 #define DRIVE_2 2
00047 #define DRIVE_3 3
00048
00050
00052 #define RQM 1<<7
00053 #define DIO 1<<6
00054 #define NONDMA 1<<5
00055 #define CMDBUSY 1<<4
00056 #define DRV3BUSY 1<<3
00057 #define DRV2BUSY 1<<2
00058 #define DRV1BUSY 1<<1
00059 #define DRV0BUSY 1<<0
00060
00061
00062
00063 #define DR_1MBPS 3
00064 #define DR_500KBPS 0
00065 #define DR_300KBPS 1
00066 #define DR_250KBPS 2
00067
00068
00069 #define DSR_RESET 1<<7
00070 #define DSR_POWERDOWN 1<<6
00071
00072
00074
00076 #define SENSE_INTERRUPT_STATUS 0x8
00077
00078
00079 #define CONFIGURE_0 0x13
00080 #define CONFIGURE_1 0
00081
00082
00083 #define CONF_EIS 1<<6
00084 #define CONF_EFIFO 1<<5
00085 #define CONF_POLL 1<<4
00086
00087
00088 #define SPECIFY 0x3
00089
00090
00091 #define RECALIBRATE 0x7
00092
00093
00094 #define READ_SECTOR_ID 0x4a
00095
00096
00097 #define READ_SECTOR 0Xe6 // MT=1 MFM=1 SK=1
00098
00099
00100 #define WRITE_SECTOR 0x0
00101
00102
00103 #define SEEK 0xf
00104
00105
00107
00109 #define ST0_IC_OK (0x0 << 6)
00110 #define ST0_IC_ABNORMAL (0x1 << 6)
00111 #define ST0_IC_NOT_EXIST (0x2 << 6)
00112 #define ST0_IC_ABNORMAL_POLL (0x3 << 6)
00113 #define ST0_SEEK (0x1 << 5)
00114 #define ST0_NOT_READY (0x1 << 3)
00115 #define ST0_HEAD
00116 #define ST0_DRIVE_A 0x0
00117 #define ST0_DRIVE_B 0x1
00118 #define ST0_DRIVE_C 0x2
00119 #define ST0_DRIVE_D 0x3
00120
00121
00122 #define COMMAND_OK ( ! (ST0&0xc0 == ST0_IC_OK ) )
00123
00124
00125 #define BLOQUE_SIZE 512
00126
00127 void set_dor(word valor);
00128
00129
00131
00133
00134 #define DMA_MASK 0xA
00135 #define DMA_CMD 0xB
00136 #define DMA_CH2_PAGE 0x81
00137 #define DMA_CH2_ADDR 0x4
00138 #define DMA_CH2_COUNT 0x5
00139 #define DMA_READ 0x46 // Floppy --> mem
00140 #define DMA_WRITE 0x4A // mem --> floppy
00141
00142
00143 void init_floppy_DMA (byte);
00144
00145
00147
00149
00150 #define SECTORES_POR_PISTA 18
00151 #define CARAS_POR_PISTA 2
00152 #define MAX_FLOPPY_TRYS 1 // Cantidad maxima de intentos de lectura/escritura antes de tirar error
00153
00154 int leer_escribir(byte operacion, dword sector_logico, byte *buffer);
00155
00156 #define MOTOR_ON 1
00157 #define MOTOR_OFF 0
00158
00159 #define TIEMPO_APAGADO_MOTOR_POR_INACTIVIDAD 2000000
00160 #define TIEMPO_TIMEOUT_COMANDO 1000000
00161 #define TIME_WAIT_FOR_MOTOR_ON 500000
00162